Electrical and Reliability Characteristics of a Scaled (~30nm) Tunnel Barrier Selector (W/Ta2O5/TaOx/TiO2/TiN) with Excellent Performance (JMAX > 10A/cm)

We demonstrate a selector device with excellent performances (J MAX > 10 7 A/cm 2 , switching speed < 20ns) at the 30nm cell size. Furthermore, these promising device characteristics were achieved in a fully CMOS compatible stack (W/Ta 2 O 5 /TaO x /TiO 2 /TiN) with extremely thin oxide layer (< 10nm). Through the comprehensive understanding on the exponential I-V curve, the effect of intrinsic/extrinsic factors such as scaling (area and thickness), and parasitic components were systemically investigated. Introduction For high density memory applications, cross-point resistive switching memory (RRAM) in 10nm regime has been intensively investigated [1]. According to the device scaling, the research and development of the selector with equivalent cell size of RRAM has been essentially required for 3D RRAM [2]. In our previous study, we proposed the concept of the tunnel barrier engineering to maximize the selector performance, as shown in Fig. 1[3]. In this study, the impact of selector performance with respect to scaling trends and CMOS compatibility (TiN substrate) will be addressed in detail with emphasis on excellent device characteristics in 30x30nm 2 active area. Experiment The TiO 2 film was deposited by ALD at 150 o C on the TiN bottom electrode (BE) patterned via substrate, which have various cell sizes (Fig. 2). The Ta 2 O 5 /TaO x film was formed by sputtering and thermal oxidation process at 300 o C. Finally, TiN (or W) as a top electrode (TE) was deposited. Results and discussion Comprehensive understanding on the exponential I-V curve Considering the exponential characteristic of a selector, the I-V curve can be classified with two distinct regions such as intrinsic region and extrinsic region (Fig. 3). First, in the low current regime (intrinsic), the curve has exponential I-V dependence; thanks to electrically formed barrier [3-4]. However, under the high current regime (extrinsic), the linear resistance (ohmic) behavior was identified. It means that an external resistance factor (R ext) will dominantly control the current conduction instead of intrinsic barrier characteristic (Fig. 4). Consequently, these parasitic R ext components should be carefully considered since the primarily required performance of a selector is the high current density. Therefore, a thorough analysis of the selector involving R ext has been done. Impact of the lateral/vertical scaling on the R ext Prior to discussing on the R ext at extrinsic regime, the device characteristics on the scaling at intrinsic regime were studied. The …